Mauricio Breternitz received the Electronics Engineer degree with honors at ITA-Instituto Tecnologico de Aeronautica, Brazil, a MSc in Computer Science at UNICAMP, Brazil and the Ph.D. in Computer Engineering at Carnegie-Mellon University.
Mauricio has made contributions in the areas of High-Performance Computing, Computer Systems Architecture and novel systems for Machine Learning.
Mauricio worked on parallelizing compilers for a research multiprocessor and for VLIW architectures, binary translation of x86 codes, on IP telephony libraries and on parallelizing database server programs.
His work, developed in industrial research laboratories, generated Intellectual Property with 56 issued U.S. Patents plus 55 more pending, in areas related to compilation, code optimization, binary translation, processor, cache and memory system organization and cryptography.
He conceived and pushed through deployment innovative algorithmic & microarchitectural ideas that have had significant positive product impact (estimated upwards of U.S.$18M) affecting millions of Intel customers. He worked at IBM (TJWatson and Austin), Motorola, Intel Labs and TimesN Systems, an Austin startup. Mauricio attained the rank of Fellow at AMD Research, a director-level position, highest on the engineering track.
Mauricio's academic service includes ACM/IEEE conferences such as IISWC (general chair), HPCA (finance chair), AMAS-BT/ISCA Workshop (organizer & chair), ISCA (publications chair) and multiple program committees. Mauricio served in 2014 as Co-PI for AMD Research on the H2020-funded DIVIDEND CHIST-ERA project. Mauricio advised numerous PhD internship projects at Intel Labs and AMD Research, and served as guest lecturer at U.S. universities. Mauricio recently moved to Europe (Portugal) serving as associate professor and principal researcher, teaching and advising students and serving on European projects and research proposals.
Current research interests include:
High-performance and high-efficiency computing, Machine learning acceleration architecture, Neuromorphic computing systems, parallel computing, and application to smart cities.